Multi-core systems have been established for a long time in the area of consumer electronics and infotainment. The operating system distributes the individual, independent applications to the particular CPUs, which are typically all alike (homogenous). Depending on the current computing load of the cores, distribution of the application software, which in most cases is not aware of being executed on a multi-core system, is performed dynamically at runtime. This should ensure a high system performance paired with a CPU load that is as balanced as possible.
Multi-core systems in motor controls, on the other hand, are normally far from homogenous. In most cases, only some of the CPUs are designed for universal use and the other cores are intended for special tasks. The new AURIX multi-core controllers from Infineon (see Figure 1), for example, comprise a total of up to three TriCore CPUs and additionally a special purpose, powerful, programmable time module.
Figure 1: AURIX multi-core architecture for motor control units with four processor cores
The latter represents the extremely heterogeneous part of the processor. Even the TriCore CPUs are not all identical, that means the TriCore part isn't homogenous as well. They differ not only in computing power and energy consumption but also in their safety features. Two out of the three CPUs are additionally equipped with so‑called lockstep cores. These execute the same operations on the same data in background as their master cores do. By comparing the results of both the master and the lockstep core, incorrect behavior in real-life operation, caused by a hardware defect for example, can be detected and immediately corrected.
The challenge for software developers is to distribute the code, grown and matured over years, to the CPUs of the multi-core system. At the same time the correct functionality must still be guaranteed. In addition, when changing to a new computing platform it must always be examined whether boundary values such as latency,