Automotive-qualified gate drive IC shrinks power train design in hybrid and electric vehicles
The AUIR0815S’ low output impedance and power losses allow operation in harsh and high temperature environments. Typical output resistance is 90 mOhm sink and 180 mOhm source. The device also features negative Vgs driving and continuous on-state capability as a result of an integrated PMOS output in parallel to the high-side pull-up NMOS. The OUTH and OUTL separated outputs allow selection of two different external resistors for charging and discharging the gate essential for controlling EMI and CdV/dT effect in high power motor driver and SMPS applications.
At low input state on the IN pin, the OUTL is pulled down to VEE, allowing negative gate driving for margination and wide range of IGBT selection. Internal shoot-through prevention logic controls the OUTH and OUTL outputs to avoid simultaneous conduction to optimize dead time delay. In addition, a low current consumption mode can be activated through an LPM input pin, which reduces the IC consumption at the expenses of slower operation delays.
The device is qualified according to AEC-Q100 standards, housed in an industry standard SO-8 package that features an environmentally friendly, lead-free and RoHS compliant bill of materials, and is part of IR’s automotive quality initiative targeting zero defects.
Availability and Pricing
Available in an 8-pin SOIC package, pricing for the AUIR0815S begins at US $0.99 each in 10,000-unit quantities. Production orders are available immediately.
More information about the AUIR0815S at
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