Infineon rolls auto-qualified power MOSFETs in TO package

December 05, 2011 // By Christoph Hammerschmidt
Infineon Technologies has introduced automotive qualified lead-free power MOSFETs for TO package types. Based on the combination of innovative packaging technology and Infineon's thin wafer process technology, the latest 40 V OptiMOS T2 power MOSFETs offer best-in-class specifications.

Infineon uses a diffusion soldering die attach approach to produce the lead-free packages that include TO-220, TO-262 and TO-263. Because of specific requirements in terms of package geometry, die pad thickness and chip size the diffusion soldering die attach approach is today only suitable for these three package types, and Infineon is able to supply them: OptiMOS T2 products in these packages are ready for production.

With the new MOSFET series, Infineon exceeds current RoHS (Restriction on Hazardous Substances) directives related to lead-based solder used to attach silicon chips to packages. Stricter ELV RoHS directives pending implementation after 2014 may require 100 percent lead-free packaging. As the first MOSFETs in the industry to eliminate lead, the new Infineon devices allow customers to meet these stricter requirements.

The Infineon-patented lead-free die attach (the interconnection between chip and leadframe of the package) uses a diffusion soldering approach, which allows improved electrical and thermal performance, manufacturability and quality. Matching this die attach technology with Infineon's thin wafer processes (60 µm compared to standard 175 µm) enables several improvements for power semiconductors:


  • The technology is environmentally friendly as no use of lead or other toxic material is involved.
  • Through the combination of diffusion soldering die attach process and thin wafer technology the R DS(on) of the devices is significantly reduced.
  • Thermal resistance (R thJC) is improved by up to 40 to 50 percent, as the conventional lead-based soft solder material has poorer thermal conductivity and acts as a thermal barrier for the heat generated on the junction of the MOSFET.
  • Further benefits are a better manufacturability because there is no solder bleed-out and no chip tiltness as well as tighter R DS(on) and R thJC distribution, and finally an improved reliability and quality due to reduced electro-mechanical stress within the product.

The specifications of the OptiMOS T2 40 V, e.g. the IPB160N04S4-02D which provides 160 A, offers a R DS(on) of only 2.0