Latest release of Tricore processor toolset improves software quality

March 16, 2017 // By Christoph Hammerschmidt
CAE tool vendor Altium is introducing a major update to its Tasking VX-toolset for the TriCore architecture with the release of version 6.2. The new version carries a many improvements and new features to heighten development performance for Infineon’s TriCore/Aurix microprocessor family.

With the toolset and embedded compiler, engineers are equipped to optimize their code to deliver the best possible performance and safety in multi-core application designs, promises Altium. The latest release 6.2 of its automotive tool brand Tasking includes several new features and improvements that help embedded systems developers to avoid code vulnerabilities, improve safety verification procedures, and strengthen overall development performance, including MISRA C:2012 Amendment 1 and a Memory Protection Unit (MPU) Configuration Data Generator for the TriCore architecture. The Aurix microcontrollers are an implementation of the TriCore architecture.

The amendment for MISRA C:2012 lays out additional guidelines to improve the coverage of safety concerns, specifically to provide rules and guidelines which ensure that common programming pitfalls are avoided.

For Aurix derivatives, the linker supports a new feature to generate information to set up the Memory Protection Unit (MPU) for a specific application. This allows for the partitioning of code and data into different safety groups on the MPU while memory access violations can be easily detected using the safety checker analysis, even before the MPU is enabled or any hardware is connected.