With a read throughput up to 333 megabytes-per-second, the HyperBus devices enable fast boot, graphics display and real-time XIP applications.
HyperRAM memory provides a scalable solution for extending fast read and write operations externally, allowing fast delivery of high-resolution graphics in the early part of the boot process for automotive, industrial and IoT applications. It also minimizes the number of pins that would normally be required to support standard DRAM, resulting in reduced PCB complexity and cost.
Spansion HyperRAM memory can operate at frequencies as fast as 166MHz in DDR mode with a fast, random initial access time of 36ns. Faster read access means less compressed, higher resolution graphics can be read, resulting in a sharper display.
Spansion's 64Mb HyperRAM will be sampling in the second quarter of 2015. It will be available in both 3V and 1.8V versions packaged in the market compatible 5x5 array BGA.
The Spansion HyperFlash memory family will offer 3V and 1.8V power-supply versions and initially include three densities: 128Mb, 256Mb and 512Mb, with 512Mb samples available now.
HyperFlash memories will be available in a space-saving 8x6mm ball grid array (BGA) package. Spansion HyperFlash memory devices provide a migration path from one Quad SPI to two Quad SPI to HyperFlash memory, allowing system applications to be scaled to different levels of flash performance when paired with compatible controllers, giving OEMs the ability to offer different product models with a single design.
The 12-pin Spansion HyperBus interface consists of an 8-pin address/data bus, a differential clock (2 signals), one chip select and a read data strobe for the controller, reducing the overall cost of the system.
Processors which have been publically announced to support the HyperBus interface include the Freescale MAC57D5xx Automotive DIS MCU, the Spansion FM4 S6E2DH general purpose MCU and the Spansion Traveo S6J324C and S6J326C automotive MCUs. Spansion is working closely with many processor companies and more MCU/SoC support is expected.