TRACE32 PowerDebug supports Infineon TriCore multicore architecture

January 19, 2012 // By Christoph Hammerschmidt
Microprocessor development tools manufacturer Lauterbach GmbH now supports the latest TriCore Multicore Architecture with its TRACE32 Debugger.

The new architecture is the platform of Infineon's next generation MCU family to meet the requirements of the latest automotive powertrain and safety applications. It consists of up to three processor cores to handle the application load in AMP, SMP or lockstep mode.

Lauterbach provides access to all on-chip debug features and supports on-chip trace as well as a full integration of the MCDS trigger and filter capabilities in the TRACE32 PowerView interface. Program flow and/or data access are recorded by means of on-chip trace in real time. The recordings can be given a time stamp, enabling statistical runtime evaluations without the need of code instrumentation.

TRACE32 also fully supports the debugging of the integrated HSM (Hardware Security Module) of Infineon's TriCore Multicore Architecture. The HSM allows automotive customers to fulfill upcoming security requirements for a better protection of their applications from potential hacking attacks.

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